The convergence of autonomous driving and electrification has made power efficiency a defining factor in next-gen vehicle E/E architecture. This session explores how AI model compression, hardware-aware software deployment, and specialized compute units can optimize real-time inference under strict power budgets. Drawing on recent experience with L4 autonomous vehicle programs, we’ll examine practical trade-offs in compute design, integration challenges, and strategies for achieving performance without overengineering.

In this session, you will learn:

• How can model compression techniques be optimized for real-time inference tasks in safety-critical automotive applications?
• What design principles are most effective for building energy-efficient E/E architectures in autonomous electric vehicles?
• How do we best coordinate software-hardware co-design across distributed vehicle systems to meet power and performance goals?
• What key lessons can be drawn from architecting L4-capable EVs with respect to system sustainability, modularity, and scalability?

• How can we reduce inference power demands through AI model compression without degrading performance?
• What role do dedicated accelerators and specialized compute units play in edge optimization?
• How can we integrate power-aware design into the early stages of E/E architecture planning?
• What architectural patterns best balance power, latency, and scalability for L4 EVs?
• Where do simulation and virtual prototyping fit into validating power-performance trade-offs?